Added DELD content, i.e. notes, question papers, question bank, assignments, DISCLAIMER and README file

DISCLAIMER.md

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+# DISCLAIMER
+
+Disclaimer for [DigitalElectronicsAndLogicDesign](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign) repository under [sppu-se-comp-content](https://git.kska.io/sppu-se-comp-content) organization.
+
+---
+
+- Please be advised that this repository ([DigitalElectronicsAndLogicDesign](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign)), its organization ([sppu-se-comp-content](https://git.kska.io/sppu-se-comp-content)), and all of its content are entirely independent and not associated to, and/or affiliated with SPPU (Savitrbai Phule Pune University, Pune) and/or any of its colleges, nor with [KSKA Git](https://git.kska.io). The materials provided within, including lab manual (handout) solutions from our contributors, notes and lab manuals (handouts) from our professors and question papers from SPPU are solely for educational purposes and convenience.
+
+- KSKA Git serves merely as a platform for this content and does not imply any association and/or endorsement from SPPU or KSKA Git. It is important to recognize that the organization (sppu-se-comp-content) and all of its repositories in KSKA Git operates independently, and any references to educational institutions or platforms are purely for informational clarity.
+
+- Furthermore, it is emphasized that the content available within this repository remains meticulously curated to align with the latest 2019 SPPU syllabus for computer engineering. Our commitment to accuracy ensures that the materials provided reflect the current academic standards prescribed by SPPU, offering students a reliable resource to supplement their studies.
+
+---

README.md

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+# Digital Electonics and Logic Design (DELD)
+
+This repository comprises comprehensive resources including handouts with solutions, lab manuals, question papers, and question banks tailored for Digital Electronics and Logic Design (DELD). This subject is a part of the computer engineering curriculum for Semester 3 at SPPU.
+
+---
+
+## Index
+
+### Notes
+
+> [Prerequisites](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Notes/DELD%20-%20Prerequisites.pdf)
+
+1. [Unit 1 - Minimization Technique](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Notes/Unit%201%20-%20Minimization%20Technique)
+2. [Unit 2 - Combinational Logic Design](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Notes/Unit%202%20-%20Combinational%20Logic%20Design)
+3. [Unit 3 - Sequential Logic Design](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Notes/Unit%203%20-%20Sequential%20Logic%20Design)
+4. [Unit 4 - Algorithmic State Machines and Programmable Logic Devices](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Notes/Unit%204%20-%20Algorithmic%20State%20Machines%20and%20Programmable%20Logic%20Devices)
+5. [Unit 5 - Logic Families](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Notes/Unit%205%20-%20Logic%20Families)
+6. [Unit 6 - Introduction to Computer Architecture](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Notes/Unit%206%20-%20Introduction%20to%20Computer%20Architecture)
+
+### Assignments
+
+> [DELD - List of assignments](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Assignments/DELD%20-%20List%20of%20assignments.pdf)
+
+1. [DELD - Lab manual](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Assignments/DELD%20-%20Lab%20manual.pdf)
+	- [Solutions](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Assignments/DELD%20-%20Lab%20manual%20solutions.pdf)
+2. [DELD - Handout (Assignment 1-13)](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Assignments/DELD%20-%20Lab%20manual%20solutions.pdf)
+	- [DELD - Handout solutions - A1](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Assignments/DELD%20-%20Handout%20solutions%20-%20A1.pdf)
+	- [DELD - Handout solutions - A2](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Assignments/DELD%20-%20Handout%20solutions%20-%20A2.pdf)
+	- [DELD - Handout solutions - A3](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Assignments/DELD%20-%20Handout%20solutions%20-%20A3.pdf)
+	- [DELD - Handout solutions - A4](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Assignments/DELD%20-%20Handout%20solutions%20-%20A4.pdf)
+	- [DELD - Handout solutions - A5](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Assignments/DELD%20-%20Handout%20solutions%20-%20A5.pdf)
+	- [DELD - Handout solutions - A6](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Assignments/DELD%20-%20Handout%20solutions%20-%20A6.pdf)
+	- [DELD - Handout solutions - B4](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Assignments/DELD%20-%20Handout%20solutions%20-%20B4.pdf)
+	- [DELD - Handout solutions - B7](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Assignments/DELD%20-%20Handout%20solutions%20-%20B7.pdf)
+	- [DELD - Handout solutions - B8](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Assignments/DELD%20-%20Handout%20solutions%20-%20B8.pdf)
+	- [DELD - Handout solutions - B9 & B10](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Assignments/DELD%20-%20Handout%20solutions%20-%20B9%20B10.pdf)
+	- [DELD - Handout solutions - B11](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Assignments/DELD%20-%20Handout%20solutions%20-%20B11.pdf)
+	- [DELD - Handout solutions - D12](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Assignments/DELD%20-%20Handout%20solutions%20-%20D12.pdf)
+
+	### Question Papers
+
+	- [IN-SEM](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Question%20Papers/IN-SEM)
+	- [END-SEM](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Question%20Papers/END-SEM)
+		- [2012-2015 Pattern *(only for REFERENCE)*](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Question%20Papers/END-SEM/2012-2015%20Pattern)
+	- [Question Bank](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/Question%20Papers/DELD%20-%20Question%20Bank.pdf)
+
+	---
+
+## Miscellaneous
+
+**-> Disclaimer:** Please read the [DISCLAIMER](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/DISCLAIMER.md) file for important information regarding the contents of this repository.
+
+**-> Note:** All the notes, question bank and lab manuals (handouts) are provided by our professors, thus to use them for anything other than educational purposes, please contact them. All the lab manual (handout) solutions are provided by our contributors. You are free to use this content provided by us, i.e. by our contributors however you want without any restrictions. All the question papers are from SPPU archives.
+
+**-> Maintained by:**
+- [TanmaySpamzzz](https://git.kska.io/TanmaySpamzzz)
+- [notkshitij](https://git.kska.io/notkshitij)
+
+**->** Repository icon from [Icons8](https://icons8.com).
+
+**-> Keywords:**
+
+SPPU, Savitribai Phule Pune University, Pune University, Computer Engineering, COMP, Second Year, SE, Semester 3, SEM-3, Syllabus, Digital Electronics and Logic Design, DELD, notes, assignments, question papers, pyqs, question bank, assignment solutions, handouts, assignment 1-13, deld notes, 
+
+Previous main branch has been pruned. [Click here to view old commits](https://git.kska.io/sppu-se-comp-content/DigitalElectronicsAndLogicDesign/src/branch/main/git-commit-logs.txt).
+
+---